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AMD Athlon Socket A Processors

A****AMT3B Model 4 (Thunderbird) (200MHz Bus)(1.75V/90°C) Package Vcc TA Level 1 Cache Level 2 Cache 453-pin staggered ceramic PGA 1.75V ± 0.1 0°C - +90°C 2—way set associative 64 KB code 2—way set associative 64 KB data 256 KB On-Die Note These processors use a Double Data Rate bus, giving an effective Bus Speed of 200MHz Core Speed Bus Speed 600MHz 100MHz Early Athlon Sample Core Speed Bus Speed 600MHz 100MHz A0600AMT3B Core Speed Bus Speed 650MHz 100MHz A0650AMT3B Core Speed Bus Speed 700MHz 100MHz A0700AMT3B AFFA Core Speed Bus Speed 750MHz 100MHz A0750AMT3B Core Speed Bus Speed 800MHz 100MHz A0800AMT3B Core Speed Bus Speed 850MHz 100MHz A0850AMT3B AGGA Core Speed Bus Speed 900MHz 100MHz A0900AMT3B AFFA Core Speed Bus Speed 950MHz 100MHz A0950AMT3B AGGA Core Speed Bus Speed 1000MHz 100MHz A1000AMT3B AYHJA ES Core Speed Bus Speed 1000MHz 100MHz A1000AMT3B AJFA Core Speed Bus Speed 1100MHz 100MHz A1100AMT3B AJFA A****AMT3C Model 4 (Thunderbird) (266MHz Bus)(1.75V/90°C) Package Vcc TA Level 1 Cache Level 2 Cache 453-pin staggered ceramic PGA 1.75V ± 0.1 0°C - +90°C 2—way set associative 64 KB code 2—way set associative 64 KB data 256 KB On-Die Note These processors use a Double Data Rate bus, giving an effective Bus Speed of 266MHz Core Speed Bus Speed 1000MHz 100MHz A1000AMT3C Core Speed Bus Speed 1100MHz 100MHz A1100AMT3C A****APT3B Model 4 (Thunderbird) (200MHz Bus)(1.75V/90°C) Package Vcc TA Level 1 Cache Level 2 Cache 453-pin staggered ceramic PGA 1.7V 0°C - +90°C 2—way set associative 64 KB code 2—way set associative 64 KB data 256 KB On-Die Note These processors use a Double Data Rate bus, giving an effective Bus Speed of 200MHz Core Speed Bus Speed 650MHz 100MHz A0650APT3B Core Speed Bus Speed 700MHz 100MHz A0700APT3B Core Speed Bus Speed 750MHz 100MHz A0750APT3B AHEA Core Speed Bus Speed 800MHz 100MHz A0800APT3B Core Speed Bus Speed 850MHz 100MHz A0850APT3B Core Speed Bus Speed 900MHz 100MHz A0900APT3B Core Speed Bus Speed 950MHz 100MHz A0950APT3B Core Speed Bus Speed 1000MHz 100MHz A1000APT3B A****AMS3B Model 4 (Thunderbird) (200MHz Bus)(1.75V/95°C) Package Vcc TA Level 1 Cache Level 2 Cache 453-pin staggered ceramic PGA 1.75V ± 0.1 0°C - +95°C 2—way set associative 64 KB code 2—way set associative 64 KB data 256 KB On-Die Note These processors use a Double Data Rate bus, giving an effective Bus Speed of 200MHz Core Speed Bus Speed 1000MHz 100MHz A1000AMS3B Core Speed Bus Speed 1100MHz 100MHz A1100AMS3B AYHJA ES Core Speed Bus Speed 1100MHz 100MHz A1100AMS3B ASHHA, AXHA Core Speed Bus Speed 1200MHz 100MHz A1200AMS3B AXIA Core Speed Bus Speed 1300MHz 100MHz A1300AMS3B AXIA Core Speed Bus Speed 1400MHz 100MHz A1400AMS3B A****AMS3C Model 4 (Thunderbird) (266MHz Bus)(1.75V/95°C) Package Vcc TA Level 1 Cache Level 2 Cache 453-pin staggered ceramic PGA 1.75V ± 0.1 0°C - +95°C 2—way set associative 64 KB code 2—way set associative 64 KB data 256 KB On-Die Note These processors use a Double Data Rate bus, giving an effective Bus Speed of 266MHz Core Speed Bus Speed 1000MHz 100MHz A1000AMS3C Core Speed Bus Speed 1133MHz 100MHz A1133AMS3C AYHJA ES Core Speed Bus Speed 1133MHz 100MHz A1133AMS3C AVIA, AXIA Core Speed Bus Speed 1200MHz 100MHz A1200AMS3C AYHJA Core Speed Bus Speed 1266MHz 100MHz A1266AMS3C Core Speed Bus Speed 1333MHz 100MHz A1333AMS3C AYHJA Core Speed Bus Speed 1400MHz 100MHz A1400AMS3C AYHJA   AHL****xxT3B Athlon SFF Model 6 (Palomino) (200MHz Bus)(90°C) Package Vcc TA Level 1 Cache Level 2 Cache 453-pin staggered ceramic PGA (except where stated) 1.6V (1000MHz/1100MHz) 1.55V (1100MHz) 0°C - +90°C 2—way set associative 64 KB code 2—way set associative 64 KB data 256 KB On-Die ??? Note These processors use a Double Data Rate bus, giving an effective Bus Speed of 200MHz Core Speed Bus Speed 1000MHz 100MHz AHL1000AUT3B Core Speed Bus Speed 1100MHz 100MHz AHL1100AUT3B Core Speed Bus Speed 1200MHz 100MHz AHL1200AHT3B Core Speed Bus Speed Package 1200MHz 100MHz 453—pin organic PGA AHL1200DHT3B   AXL****DxT3B Athlon SFF Model 6 (Palomino) (200MHz Bus)(90°C) Package TA Level 1 Cache Level 2 Cache 453-pin staggered ceramic PGA (except where stated) 0°C - +90°C 2—way set associative 64 KB code 2—way set associative 64 KB data 256 KB On-Die ??? Note These processors use a Double Data Rate bus, giving an effective Bus Speed of 200MHz Core Speed Bus Speed Vcc 1300MHz 100MHz 1.5V AXL1500DLT3B Core Speed Bus Speed Vcc 1400MHz 100MHz 1.45V AXL1600DQT3B