6x86L |
Package
Level 1 Cache
TCASE |
296-pin Staggered PGA w/ Integrated Heatspreader
256 bytes primary code cache
16-KByte unified write-back
0°C - +70°C |
Vcc
VIO
Core Speed
Bus Speed
CPUID
DIR0
DIR1
Stepping |
2.8V ± 0.07V
3.3V ± 0.15V
120MHz
60MHz
0520
31
22
4.2 |
6x86L-P150+GP
120MHz
2.8V |
 |
|
Vcc
VIO
Core Speed
Bus Speed
CPUID
DIR0
DIR1
Stepping |
2.8V ± 0.07V
3.3V ± 0.15V
120MHz
60MHz
0520
31
22
4.2 |
6x86L-P150+GP
120MHz
2.8V |
 |
|
Vcc
VIO
Core Speed
Bus Speed
CPUID
DIR0
DIR1
Stepping |
2.8V ± 0.07V
3.3V ± 0.15V
120MHz
60MHz
0520
31
22
4.2 |
6x86L-PR150+GP
120MHz
Core: 2.8V I/O: 3.3V
Fan/Heatsink Required |
 |
|
Vcc
VIO
Core Speed
Bus Speed |
2.8V ± 0.07V
3.3V ± 0.15V
133MHz
66MHz |
6x86L-PR166+GP
133MHz
2.8V |
Vcc
VIO
Core Speed
Bus Speed
CPUID
DIR0
DIR1
Stepping |
2.8V ± 0.07V
3.3V ± 0.15V
133MHz
66MHz
0520
31
22
4.2 |
6x86L-PR166+GP
133MHz
Core: 2.8V I/O: 3.3V
Fan/Heatsink Required |
 |
|
Vcc
VIO
Core Speed
Bus Speed |
3.3V ± 0.07V
3.3V ± 0.15V
133MHz
66MHz |
6x86L-PR166+GP
133MHz
Core: 2.8V I/O: 3.3V
Fan/Heatsink Required |
 |
|
Vcc
VIO
Core Speed
Bus Speed |
3.3V ± 0.07V
3.3V ± 0.15V
133MHz
66MHz |
6x86L-PR166+GP
133MHz
3.3V
FAN/HEATSINK REQUIRED |
Vcc
VIO
Core Speed
Bus Speed |
2.8V ± 0.07V
3.3V ± 0.15V
150MHz
75MHz |
6x86L-P200+GP
150MHz
2.8V |
Vcc
VIO
Core Speed
Bus Speed
CPUID
DIR0
DIR1
Stepping |
2.8V ± 0.07V
3.3V ± 0.15V
150MHz
75MHz
0520
31
22
4.2 |
6x86L-PR200+GP
150MHz
Core: 2.8V I/O: 3.3V
Fan/Heatsink Required |
 |
|
Vcc
VIO
Core Speed
Bus Speed
|
3.3V (3.135V—3.6V)
3.3V ± 0.15V
150MHz
75MHz
|
6x86L-PR200+GP
150MHz
3.3V
FAN/HEATSINK REQUIRED |
Vcc
VIO
Core Speed
Bus Speed |
|
|
