| |
80P23T |
Package
Vcc
TCASE
Level 1 Cache |
169—pin ceramic PGA
5V ± 5%
0°C - +95°C
8—Kbyte, set—associative, unified code & data cache |
Core Speed
Bus Speed |
50MHz
25MHz |
80P23T-25 Q607 ES A1 (50MHz) |
|
ODP486DX |
Package
Vcc
TCASE
Level 1 Cache |
169—pin ceramic PGA
To be installed into overdrive socket on 486SX system
5V ± 5%
0°C - +95°C
8—Kbyte, set—associative, unified code & data cache |
Core Speed
Bus Speed |
50MHz
25MHz |
ODP486DX-25 |
Core Speed
Bus Speed |
66MHz
33MHz |
ODP486DX-33 SZ802 B1 |
Core Speed
Bus Speed |
66MHz
33MHz |
ODP486DX-33 SZ876 |
|
ODPR486DX |
Package
Vcc
TCASE
Level 1 Cache |
169—pin ceramic PGA
5V ± 5%
0°C - +95°C
8—Kbyte, set—associative, unified code & data cache |
| Comments |
To be installed into original 486 socket
Upgrades to 486DX2 |
Core Speed
Bus Speed |
50MHz
25MHz |
ODPR486DX-25 SZ678 |
Core Speed
Bus Speed |
50MHz
25MHz |
ODPR486DX-25 SZ697 B1 |
Core Speed
Bus Speed |
50MHz
25MHz |
ODPR486DX-25 SZ877 V3.0 |
Core Speed
Bus Speed |
66MHz
33MHz |
ODPR486DX-33 SZ690 |
Core Speed
Bus Speed
Reset ID
Stepping |
66MHz
33MHz
0433
B1 |
ODPR486DX-33
SZ698
B1 |
 |
|
Core Speed
Bus Speed
CPUID
Stepping |
66MHz
33MHz
0435
aB0 or aC0 |
ODPR486DX-33
SZ878
V3.0 |
 |
|
|
ODP486SX |
Package
Vcc
TCASE
Level 1 Cache |
169—pin ceramic PGA
5V ± 5%
0°C - +95°C
8—Kbyte, set—associative, unified code & data cache |
| Comments |
This processor fits into the overdrive socket on a 486SX system,
and will upgrade the system to a 486DX2.
Motherboard jumper settings should be as for a 486SX.
The speed shown on the processor is the bus speed, NOT the core speed. |
Core Speed
Bus Speed |
40MHz
20MHz |
ODP486SX-20 SZ576 |
Core Speed
Bus Speed |
40MHz
20MHz |
ODP486SX-20 SZ635 |
Core Speed
Bus Speed |
40MHz
20MHz |
ODP486SX-20 SZ675 |
Core Speed
Bus Speed
Reset ID
Stepping |
40MHz
20MHz
0433
B1 |
ODP486SX-20
SZ699
B1 |
 |
|
Core Speed
Bus Speed |
50MHz
25MHz |
ODP486SX-25 SX676 |
Core Speed
Bus Speed |
50MHz
25MHz |
ODP486SX-25 SX800 B1 (Factory Heatsink) |
Core Speed
Bus Speed |
50MHz
25MHz |
ODP486SX-25 SZ874 V3.0 |
Core Speed
Bus Speed |
66MHz
33MHz |
ODP486SX-33 SX801 B1 (Factory Heatsink) |
Core Speed
Bus Speed |
66MHz
33MHz |
ODP486SX-33 SZ875 V3.0 |
|
DX2ODP |
Package
Vcc
TCASE
Level 1 Cache |
169—pin ceramic PGA
To be installed into overdrive socket on 486SX system
5V ± 5%
0°C - +95°C
8—Kbyte, set—associative, unified code & data cache |
Core Speed
Bus Speed |
50MHz
25MHz |
DX2ODP66 SZ902 V2.0 |
Core Speed
Bus Speed |
66MHz
33MHz |
DX2ODP50 SZ932 V4.0 |
Core Speed
Bus Speed
|
66MHz
33MHz
|
DX2ODP66 SZ903 V3.0 |
Core Speed
Bus Speed
CPUID
Stepping |
66MHz
33MHz
0435
aB0 or aC0 |
DX2ODP66
SZ933
V4.0 |
 |
|
|
DX2ODPR |
Package
Vcc
TCASE
Level 1 Cache |
169—pin ceramic PGA
To be installed into original 486 socket
5V ± 5%
0°C - +95°C
8—Kbyte, set—associative, unified code & data cache |
Core Speed
Bus Speed |
50MHz
25MHz |
DX2ODPR50 SZ908 (?) |
Core Speed
Bus Speed |
50MHz
25MHz |
DX2ODPR50 SZ934 V4.0 |
Core Speed
Bus Speed
CPUID
Stepping |
66MHz
33MHz
0435
aB0 or aC0 |
DX2ODPR66
SZ904
V3.0 |
 |
|
Core Speed
Bus Speed
CPUID
Stepping |
66MHz
33MHz
0435
aB0 or aC0 |
DX2ODPR66
SZ935
V4.0 |
 |
|
|
SX2ODP |
Package
Vcc
TCASE
Level 1 Cache |
169—pin ceramic PGA
To be installed into overdrive socket on 486SX system
5V ± 5%
0°C - +95°C
8—Kbyte, set—associative, unified code & data cache |
Core Speed
Bus Speed |
50MHz
25MHz |
SX2ODP50 SZ901 V1.0 |
|
DX4ODP |
Package
Vcc
TCASE
Level 1 Cache |
169—pin ceramic PGA
To be installed into overdrive socket on 486SX system
5V ± 5%
0°C - +95°C
16—Kbyte, set—associative, unified code & data cache |
Core Speed
Bus Speed |
75MHz
25MHz |
DX4ODP75 SU001 V1.1 |
Core Speed
Bus Speed |
75MHz
25MHz |
DX4ODP75 SZ923 V1.0 |
Core Speed
Bus Speed |
75MHz
25MHz |
DX4ODP75 SZ956 V1.1 |
Core Speed
Bus Speed
|
100MHz
33MHz
|
DX4ODP100 SU002 V1.1 |
Core Speed
Bus Speed
CPUID
Stepping |
100MHz
33MHz
1480
A |
DX4ODP100
SZ924
V1.0 |
 |
|
Core Speed
Bus Speed
|
100MHz
33MHz
|
DX4ODP100 SZ957 V1.1 |
|
DX4ODPR |
Package
Vcc
TCASE
Level 1 Cache |
169—pin ceramic PGA
To be installed into original 486 socket
5V ± 5%
0°C - +95°C
16—Kbyte, set—associative, unified code & data cache |
Core Speed
Bus Speed |
75MHz
25MHz |
DX4ODPR75 SU003 V1.1 |
Core Speed
Bus Speed |
75MHz
25MHz |
DX4ODPR75 SZ925 V1.0 |
Core Speed
Bus Speed
CPUID
Stepping |
75MHz
25MHz
0480
A |
DX4ODPR75
SZ958
V1.1 |
 |
|
Core Speed
Bus Speed |
100MHz
33MHz |
DX4ODPR100 SU004 |
Core Speed
Bus Speed |
100MHz
33MHz |
DX4ODPR100 SZ926 V1.0 |
Core Speed
Bus Speed
CPUID
Stepping |
100MHz
33MHz
0480
A |
DX4ODPR100
SZ959
V1.1 |
 |
|
|
